As the dimension of metal-oxide semiconductor field-effect transistor (MOSFET) devices is gradually reduced, the short channel effect (SCE) becomes a key issue. Fin field effect transistor (Fin-FET) device demonstrates desired gate-control ability in controlling charges in the channel, and thus the size of complementary metal oxide semiconductor (CMOS) device may be further reduced.
During the fabrication process of a Fin-FET device, a metal gate electrode may be used to replace a dummy gate electrode that is made of polycrystalline silicon, and a gate dielectric layer may be used to replace a dummy insulating layer. Therefore, during the fabrication process, the dummy gate electrode and the dummy insulating layer may be removed to form a trench such that the gate dielectric layer and the metal gate electrode can then be formed. However, during the etching process to remove the dummy insulating layer, the etching process may result in lateral etching of silicon oxides in the shallow trench isolation (STI), which may form gaps in silicon oxides to expose the source electrode and/or the drain electrode formed on the two opposite sides of the trench. Further, during the process to form a metal gate electrode in the trench, the formed metal gate electrode may easily fill into the gaps and thus may be connected to the source electrode and/or the drain electrode. As such, the reliability of the device may be degraded. The disclosed semiconductor devices and fabrication methods thereof are directed to solve one or more problems set forth above and other problems in the art.